An amorphous silicon flat detection substrate is a device for converting X ray into electrical signals with a structure including a cesium iodide scintillation layer, amorphous selenium photoelectric conversion layer, and thin film transistors (TFT). A thin film transistor includes a source electrode, a drain electrode, a gate electrode, an active layer and a passivation layer, the source electrode and the drain electrode are directly connected with the active layer; the material for the source electrode and the drain electrode is a conductor, typically a metal; the material for the active layer is a semiconductor, typically amorphous silicon (a-Si), low temperature polysilicon (LTPS), amorphous metal oxide semiconductor (e.g., indium gallium zinc oxide (IGZO), indium zinc tin oxide (InZnSnO), indium zinc oxide (IZO)). A thin film transistor with amorphous metal oxide semiconductor as the active layer is generally called an oxide thin film transistor (Oxide TFT).
As shown in FIG. 1, a structure of an amorphous silicon flat detection substrate includes: a glass substrate 101 as a base layer, a gate electrode 102 disposed on the glass substrate 101, a gate electrode insulating layer 103 deposited on the glass substrate 101 and the gate electrode 102, amorphous silicon 104 deposited on the gate electrode insulating layer 103, N-type semiconductor 105 deposited on the amorphous silicon 104, a metal drain electrode 106 and a metal source electrode 107 deposited on the N-type semiconductor 105, a photodiode (PIN junction) formed of a stack of P-type silicon 108, intrinsic silicon 109 and N-type semiconductor 115 and disposed on the metal drain electrode 106, and an electrode 120 disposed on the N-type semiconductor 115 of the PIN junction, an insulating layer 113 disposed on the electrode 120 and the metal source electrode 107, a pixel electrode 110 and a reverse biasing voltage cathode 130 disposed on the insulating layer 113, and a resin passivation layer 111 formed on the pixel electrode 110 for protecting the device. The pixel electrode 110 is electrically connected with the source electrode 107 through a via 117 formed in the insulating layer 120, and the reverse biasing voltage cathode 130 is electrically connected with the electrode 120 through a via.
The amorphous silicon 104 deposited on the gate electrode insulating layer 103 constitutes an amorphous silicon active layer; the electrodes are connected with the amorphous silicon active layer through the N-type semiconductor 105, and because the valence band energy level of the used the source electrode and the drain electrode 106 differs greatly from that of the amorphous silicon 104 of the active layer, and the lattice matching is not good, and this causes the formed heterojunction or homojunction remarkably influence the driving current signal, resulting in poor interface contact, hence influencing electricity characteristics of the thin film transistor.
It can be seen that the great difference between valence band levels of the source electrode and the drain electrode of a metal material and the active layer of an amorphous silicon material influence significantly the electricity characteristics of the thin film transistor.